Explore projects
-
-
Updated
-
Ales Svetek / ruckus
Lawrence Berkeley National Labs BSD variant licenseVivado build system
Updated -
IPbus example design for Zynq Ultrascale+ development board zcu102
Updated -
Project containing design files for my experimentation with the GBT link
Updated -
Updated
-
Updated
-
Petalinux configuration and binaries for the reference implementation of the White Rabbit PTP Core (https://www.ohwr.org/projects/wr-cores/wiki/Wrpc_core)
Updated -
A port of Cyclone-V-ADC-UART to the LASP framework
Updated -
Caleb James Smith / bdaq53
BSD 3-Clause "New" or "Revised" LicenseDAQ and test system for the RD53 readout chips: fork for use at the University of Kansas.
Updated -
Ola Slettevoll Groettvik / UVVM_All
MIT LicenseOpen Source VHDL Verification Component Framework for making structured VHDL testbenches for verification of FPGA and ASIC.
Updated -
-
Updated
-
Web interface to verify FELIX boards based on Versal chip
Updated -
Mikkel Weis Kallesoe / bdaq53
BSD 3-Clause "New" or "Revised" LicenseDAQ and test system for the RD53 readout chips
Updated -
Updated
-
Michal Husejko / Hog
Apache License 2.0Updated -
Burhani Taher Saifuddin / Delphes_Backup
Creative Commons Attribution Share Alike 4.0 InternationalUpdated -
Updated