Explore projects
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The Dirac Extension for the linear collider related detector studies in the ILC VO
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ALICE ITS LS2 upgrade working package 10 (WP10) Readout Unit simulation
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It contains libraries common for HDL verification.
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make.exe (binaries) and generic.mk used to lauch our different PLDs/FPGA/CPLDs toolchains
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Optimized GBT-FPGA : single channel and multi-channel examples on VC709
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cloned from BE-BI/VFC-HD, with public access and WhiteRabbit additions
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Recasted analyses in MadAnalysis5 See also http://madanalysis.irmp.ucl.ac.be/wiki/Ma5PadStepByStep http://madanalysis.irmp.ucl.ac.be/wiki/PublicAnalysisDatabase
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GBT-SC for FPGA: This module (VHDL) allows performing slow-control of the front-end through GBT links (GBTx and SCA configuration)
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