Added license headers (Apache v2)

Closes FLX-1762, FLX-1697, FLX-1704, and FLX-1716

See merge request !308

Conflicts:
	scripts/FELIX_fullmode_top/daily.sh
	scripts/FELIX_fullmode_top/do_implementation_BNL712.tcl
	scripts/FELIX_fullmode_top/do_implementation_BNL712_DUNE.tcl
	scripts/FELIX_fullmode_top/source_import_fmwrapper_core.tcl
	scripts/FELIX_fullmode_top/source_import_fmwrapper_core_bnl711.tcl
	scripts/FELIX_fullmode_top/vivado_import_felix.tcl
	scripts/FELIX_fullmode_top/vivado_import_felix_bnl711.tcl
	scripts/FELIX_top/FELIX_import_sigasi.tcl
	scripts/FELIX_top/FLX709_GBT_import_vivado.tcl
	scripts/FELIX_top/FLX711_GBT_import_vivado.tcl
	scripts/FELIX_top/ci-full-24ch.sh
	scripts/FELIX_top/ci-gbt-8ch.sh
	scripts/FELIX_top/daily.sh
	scripts/FELIX_top/do_implementation_BNL711.tcl
	scripts/FELIX_top/do_implementation_BNL712.tcl
	scripts/FELIX_top/do_implementation_BNL712_strips_2ch_debug.tcl
	scripts/FELIX_top/do_implementation_BNL712_strips_4ch.tcl
	scripts/FELIX_top/do_implementation_VC709_strips.tcl
	scripts/FELIX_top/do_implementation_VC709_strips_2ch_debug.tcl
	scripts/FELIX_top/strips_build_bnl712.sh
	scripts/FELIX_top/strips_build_vc709.sh
	scripts/filesets/centralRouter_fileset.tcl
	scripts/filesets/crfm_fileset.tcl
	scripts/filesets/fullmode_toplevel_fileset.tcl
	scripts/filesets/gbt_toplevel_fileset.tcl
	scripts/helper/IG_do_implementation_post.tcl
	scripts/old_scripts/FELIX_top/FLX709_GBT_import_vivado.tcl
	scripts/old_scripts/FELIX_top/FLX711_GBT_import_vivado.tcl
	scripts/old_scripts/FELIX_top/FLX712_GBT_import_vivado.tcl
	scripts/old_scripts/FELIX_top/daily.sh
	scripts/old_scripts/FELIX_top/dailycleanup.sh
	scripts/old_scripts/FELIX_top/do_implementation_BNL711.tcl
	scripts/old_scripts/FELIX_top/do_implementation_BNL711_8CH.tcl
	scripts/old_scripts/FELIX_top/do_implementation_BNL712.tcl
	scripts/old_scripts/FELIX_top/do_implementation_BNL712_8CH.tcl
	scripts/old_scripts/FELIX_top/do_implementation_HTG710.tcl
	scripts/old_scripts/FELIX_top/do_implementation_VC709.tcl
	scripts/old_scripts/MROD_top/do_implementation_BNL711.tcl
	scripts/old_scripts/MROD_top/do_implementation_BNL712.tcl
	scripts/old_scripts/MROD_top/do_implementation_mrod_bnl711.tcl
	scripts/old_scripts/MROD_top/do_implementation_mrod_bnl712.tcl
	scripts/old_scripts/MROD_top/source_import_crfm_felixmrod.tcl
	scripts/old_scripts/MROD_top/source_import_fmwrapper_core_bnl711.tcl
	scripts/old_scripts/MROD_top/vivado_implement_mrod_bnl712.tcl
	scripts/old_scripts/MROD_top/vivado_import_mrod_bnl711.tcl
	scripts/old_scripts/MROD_top/vivado_import_mrod_bnl712.tcl
	scripts/old_scripts/MROD_top/wvivado_implement_mrod_bnl712.tcl
	scripts/old_scripts/MROD_top/wvivado_import_mrod_bnl712.tcl
	scripts/old_scripts/OpenCores/compare_opencores.sh
	scripts/old_scripts/Wupper/do_implementation_HTG710.tcl
	scripts/old_scripts/Wupper/do_implementation_VC709.tcl
	scripts/old_scripts/Wupper/vivado_import.tcl
	scripts/old_scripts/centralRouter/IG_source_import_cr.tcl
	scripts/old_scripts/centralRouter/do_implementation.tcl
	scripts/old_scripts/centralRouter/eproc_downgrade.tcl
	scripts/old_scripts/centralRouter/eproc_upgrade.tcl
	scripts/old_scripts/centralRouter/source_import_cr.tcl
	scripts/old_scripts/centralRouter/source_import_cr_bnl711.tcl
	scripts/old_scripts/centralRouter/source_import_cr_files.tcl
	scripts/old_scripts/centralRouter/source_import_emu.tcl
	scripts/old_scripts/centralRouter/vivado_import_felix.tcl
	scripts/old_scripts/centralRouterFullMode/source_import_crfm.tcl
	scripts/old_scripts/centralRouterFullMode/source_import_fmemu.tcl
	scripts/old_scripts/centralRouterFullMode/vivado_import_felix.tcl
	scripts/old_scripts/gbt_top/source_import_gbt_core.tcl
	scripts/old_scripts/gbt_top/source_import_gbt_core_bnl711.tcl
	scripts/old_scripts/gbt_top/source_import_gbt_core_fullmode.tcl
	scripts/old_scripts/gbt_top/source_import_gbt_core_fullmode_bnl711.tcl
	scripts/old_scripts/gbt_top/source_import_gbt_core_low_latency_version.tcl
	scripts/old_scripts/ttc_top/source_import_ttc_decoder.tcl
	scripts/old_scripts/ttc_top/vivado_import_felix.tcl
	simulation/UVVMExample/ci-FULLModeToHost.do
	simulation/UVVMExample/ci-crc20.do
	simulation/UVVMExample/ci-egroup.do
	simulation/UVVMtests/ci-strips.do
	sources/templates/build-strips.sh

Conflicts:
	simulation/FELIX_Top/felig_sim_top_bnl712.vhd
	simulation/FELIX_Top/waveforms/FELIG_phase1_behav.wcfg
	simulation/ItkStrip/tb_EPROC_OUT4_lcb_phase1.vhd
	simulation/ItkStrip/tb_EPROC_OUT4_r3l1_phase1.vhd
	simulation/ItkStrip/tb_EPROC_OUT8_strips_idle_inserter.vhd
	simulation/ItkStrip/tb_EPROC_OUT8_strips_phase1.vhd
	simulation/ItkStrip/tb_lcb_mux.vhd
	simulation/UVVMExample/tb/FULLModeToHost_tb.vhd
	simulation/Wupper/pcie_ep_sim_model.vhd
	sources/FelixTop/felix_fullmode_top.vhd
	sources/FelixTop/felix_fullmode_top_bnl711.vhd
	sources/FelixTop/felix_top_bnl711.vhd
	sources/GBT/gbt_code/FELIX_gbt_wrapper_KCU.vhd
	sources/ItkStrip/EPROC_OUT4_idle_inserter.vhd
	sources/ItkStrip/EPROC_OUT4_itk_strip_lcb_phase1.vhd
	sources/ItkStrip/EPROC_OUT4_itk_strip_r3l1_phase1.vhd
	sources/ItkStrip/EPROC_OUT8_idle_inserter.vhd
	sources/ItkStrip/EPROC_OUT8_strips_phase1.vhd
	sources/ItkStrip/lcb_mux.vhd
	sources/ItkStrip/lcb_mux_reg.vhd
	sources/ItkStrip/strips_config_map.vhd
	sources/ItkStrip/strips_idle_inserter.vhd
	sources/centralRouter/TTCtoHost_channel.vhd
	sources/centralRouter/thFMdm.vhd
	sources/pcie/dma_read_write.vhd
	sources/templates/dma_control.vhd
	sources/templates/pcie_package.vhd
	sources/templates/strips_config_package.vhd
	sources/templates/strips_config_package.vhd.template
	sources/templates/strips_phase1_long_stave_mapping.vhd
	sources/templates/strips_phase1_long_stave_mapping.vhd.template
	sources/templates/strips_phase1_unknown_mapping.vhd
	sources/templates/strips_phase1_unknown_mapping.vhd.template

Release 4.10

See merge request !298

Resolve FLX-1697 "Ttc emulator longb ocr support"

See merge request !300

reverted renaming of entity ttc_wrapper. Instead we should change the file name to reflect the entity name

Fix for FLX-1715: DATA_WIDTH dependency for sorting memory mem_addra calculation

See merge request !296

FLX-1720: Added WupperCodeGen as a submodule

Closes FLX-1720

See merge request !299

Resolve FLX-1704 "Addbcrcounter"

See merge request !288

This should fix FLX-1716

See merge request !297

The toplevel VHDL files for BNL712 did not have the Si5345_RSTN pin, this was...

See merge request !294

Fix for FLX-1715: DATA_WIDTH dependency for sorting memory mem_addra calculation

Closes FLX-1715

See merge request !295